/* rabits.h */ #ifdef MOTO /* register array definitions MOTOROLA bytes */ #define K$FLAG0 (kiwi1->ra.b[1]) #define K$FLAG1 (kiwi1->ra.b[0]) #define K$FLAG (kiwi1->ra.w[0]) #define K$MULCOM (kiwi1->ra.b[3]) /* MULtibus COMmand register */ #define K$ADDCOM (kiwi1->ra.b[2]) /* ADDitional COMmand register */ #define K$COM (kiwi1->ra.w[1]) /* word version of command register */ #define K$RTNREG (kiwi1->ra.b[5]) /* ReTurN REGister */ #define K$WDCNT (kiwi1->ra.b[4]) #define K$BFSZL (kiwi1->ra.b[7]) #define K$BFSZU (kiwi1->ra.b[6]) #define K$BFSZ (kiwi1->ra.w[3]) #define K$BFADL (kiwi1->ra.b[9]) #define K$BFADM (kiwi1->ra.b[8]) #define K$BFAD (kiwi1->ra.w[4]) #define K$BFADU (kiwi1->ra.b[0x0b]) #define K$MINIT (kiwi1->ra.b[0x0a]) /* INITialization register */ #define K$COMSTA (kiwi1->ra.b[0x0c]) #define K$CHADD (kiwi1->ra.b[0x0d]) #define K$ERR0 (kiwi1->ra.b[0x0f]) #define K$ERR1 (kiwi1->ra.b[0x0e]) #define K$ERR (kiwi1->ra.w[7]) #else /* register array definitions MOTOROLA bytes */ #define K$FLAG0 (kiwi1->ra.b[0]) #define K$FLAG1 (kiwi1->ra.b[1]) #define K$FLAG (kiwi1->ra.w[0]) #define K$MULCOM (kiwi1->ra.b[2]) /* MULtibus COMmand register */ #define K$ADDCOM (kiwi1->ra.b[3]) /* ADDitional COMmand register */ #define K$COM (kiwi1->ra.w[1]) /* word version of command register */ #define K$RTNREG (kiwi1->ra.b[4]) /* ReTurN REGister */ #define K$WDCNT (kiwi1->ra.b[5]) #define K$BFSZL (kiwi1->ra.b[6]) #define K$BFSZU (kiwi1->ra.b[7]) #define K$BFSZ (kiwi1->ra.w[3]) #define K$BFADL (kiwi1->ra.b[8]) #define K$BFADM (kiwi1->ra.b[9]) #define K$BFAD (kiwi1->ra.w[4]) #define K$BFADU (kiwi1->ra.b[0x0a]) #define K$MINIT (kiwi1->ra.b[0x0b]) /* INITialization register */ #define K$COMSTA (kiwi1->ra.b[0x0d]) #define K$CHADD (kiwi1->ra.b[0x0c]) #define K$ERR0 (kiwi1->ra.b[0x0e]) #define K$ERR1 (kiwi1->ra.b[0x0f]) #define K$ERR (kiwi1->ra.w[7]) #endif /* Multibus Command Bits */ #define I$RQRD (0x80) #define I$GO (0x20) #define I$CSTA (0x10) #define I$C256 (0x08) #define I$ENDG (0x04) #define I$READ (0x02) #define I$WRIT (0x01) /* Additonal command, use in word command register */ #define I$WRVL (0x0100) #define I$WRIN (0x0200) #define I$A256 (0x0400) #define I$RUDC (0x0800) #define I$ONL (0x1000) #define I$OFL (0x2000) /* Initialization Bits */ #define I$STK (0x40) #define I$ODD (0x20) #define I$DEOI (0x10) #define I$SNGL (0x08) #define I$HSP (0x04) #define I$SWP (0x02) #define I$DIIM (0x01) /* return register bits */ #define I$REDY (K$RTNREG & 0x80) #define I$ON (K$RTNREG & 0x40) #define I$ERRB (K$RTNREG & 0x20) #define I$CRTY (K$RTNREG & 0x10) #define I$CRCV (K$RTNREG & 0x08) #define I$ENDP (K$RTNREG & 0x04) #define I$RDCP (K$RTNREG & 0x02) #define I$WRCP (K$RTNREG & 0x01) /* error register bits */ #define I$HALT (K$ERR0 & 0x80) #define I$CHRE (K$ERR0 & 0x40) #define I$SERE (K$ERR0 & 0x20) #define I$BPER (K$ERR0 & 0x10) #define I$DVNR (K$ERR0 & 0x08) #define I$ZFWA (K$ERR0 & 0x04) #define I$NEXM (K$ERR0 & 0x02) #define I$OFFL (K$ERR0 & 0x01) #define I$INVC (K$ERR1 & 0x80) #define I$CPAR (K$ERR1 & 0x40) #define I$STKS (K$ERR1 & 0x20) #define I$EFNX (K$ERR1 & 0x10) #define I$ODBY (K$ERR1 & 0x08) #define I$STRD (K$ERR1 & 0x04) #define I$STWR (K$ERR1 & 0x02) #define I$CTBD (K$ERR1 & 0x01) #define VALID 0 #define INVALID 1 #define VLCM 0x80 #define IMMC 0x40 #define BBR 0x20 #define STS 0x10 #define SPAD 0x08 #define SPCM 0x04 #define NTRD 0x02 /* */